Publications & patents
26 publications (thesis, journal, conference, and workshop papers) and 29 granted U.S. patents, plus a map of where those ideas were cited, in patents and papers alike. The continuously updated record lives on Google Scholar.
Research
26 of 26 shown
2025
2024
- ConferenceBLQ: Light-Weight Locality-Aware Runtime for Blocking-Less QueuingPDF ↗
2022
- ConferenceSPAMeR: Speculative Push for Anticipated Message Requests in Multi-Core SystemsPDF ↗
2021
2020
- ConferenceThe Non-Uniform Compute Device (NUCD) Architecture for Lightweight Accelerator OffloadPDF ↗
2019
2018
- WorkshopThis Architecture Tastes Like MicroarchitecturePDF ↗
2017
- JournalDeadlock-free buffer configuration for stream computingPDF ↗
- JournalRaftLib: a C++ template library for high performance stream parallel processingPDF ↗
- WorkshopEliminating Dark Bandwidth: a data-centric view of scalable, efficient performance, post-MoorePDF ↗
- ConferenceThe Sparse Data Reduction Engine (SPiDRE): Chopping Sparse Data One Byte at a TimePDF ↗
2015
- ThesisOnline Modeling and Tuning of Parallel Stream Processing SystemsPDF ↗
- ConferenceAutomated Reliability Classification of Queueing Models for Streaming Computation using Support Vector MachinesPDF ↗
- WorkshopRaftLib: A C++ template library for high performance stream parallel processingPDF ↗
- WorkshopDeadlock-free Buffer Configuration for Stream ComputingPDF ↗
- JournalRun Time Approximation of Non-blocking Service Rates for Streaming SystemsPDF ↗
- ConferenceRun Time Approximation of Non-blocking Service Rates for Streaming SystemsPDF ↗
- ConferenceOnline Automated Reliability Classification of Queueing Models for Streaming Processing using Support Vector MachinesPDF ↗
2014
- WorkshopUse of a Levy Distribution for Modeling Best Case Execution Time VariationPDF ↗
2013
2011
- ConferenceCrossing Boundaries in TimeTrial: Monitoring Communications Across Architecturally Diverse Computing PlatformsPDF ↗
Patents
29 granted U.S. patents (co-inventor) across memory systems, cache/coherence, heterogeneous compute, data movement, queueing, and virtualization, plus applications in flight. Each number links to Google Patents.
- Translation hints
- Multi-channel Q-monitor
- Checkpoint Saving
- Virtual stashing
- Insert operation - Low contention hardware-accelerated multi-producer single consumer queue
- Translation for blocks with tightly-coupled interfaces
- Write Clean Conditional
- Cache stash relay
- Snoop Logging
- Fine granular protections
- Mapping a Distributed Heap onto a Hierarchical Memory System to Enable Efficient Inter-Process Communication
- Fault tolerant memory system
- Virtual Context Format for Fast Heterogeneous State Migration
- Dynamic SVE Vectorization of Scalar Operations using Dataflow Vectorization
- Fast Address Translation for Virtual Machines
- An efficient method for Scalable Range Based Coherence Modification
- Method and Apparatus for Two-Layer Copy-on-Write
- Efficient Lazy Migration of Virtual Compute Contexts
- Method and Apparatus for Scheduling in a Non-Uniform Compute Device
- The Memory Storm Fabric for Hardware Accelerated, Scalable Virtual Shared Memory
- Memory Address Translation
- Cache-Based Communication Between Execution Threads of a Data Processing System
- Memory Node Controller
- Method and Apparatus for Reordering in a Non-Uniform Compute Device
- Apparatus and method for predicting a redundancy period
- Virtual Context Table for Fast Heterogeneous Context Migration
- Method and Apparatus for Fast Context Cloning in a Data Processing System
- Smart Sparse Data Movement Engine for Increasing Utilization of Bandwidth and Cache Lines
- Memory Synchronization Filter
In flight
- Message channels
Impact · patents
Where the ideas were cited
Forward citations from Google Patents: 120+ later filings cite the 29 granted patents, at Apple, Intel, NVIDIA, Microsoft, Samsung, IBM, AMD, Google, and a wave of AI-silicon startups. Each chip links to the cited patent behind the cluster.
Accelerator integration & offload
- Intel: Configuring/reconfiguring chains of accelerators
- Samsung: Host/accelerator work-sharing via shared memory
- NVIDIA: Unified virtual memory in heterogeneous systems
- NVIDIA: Decoupled lookup-table accelerator in SoC
- NVIDIA: Offloading tasks to decoupled accelerators in SoC
Memory fabrics & disaggregation
- Apple: Scalable system-on-a-chip (M-series fabric)
- Apple: Address hashing across multiple memory controllers
- Apple: Soft memory folding / compacted pipe addressing
- Intel: Hardware-assisted virtual switch
- Intel: Flexible NIC host interface
Coherence at scale
- Microsoft: Snoop filter w/ disaggregated vector table
- Microsoft: Adaptive coherency tracking (×4 patents)
- IBM: Coordination namespace / global virtual address space
- IBM: Cache snooping coherence protection (×3)
- IBM: Pipeline-parallel computing w/ extended memory
Hardware queues & message passing
- Google: Optimizing hardware FIFO instructions
- Xilinx (AMD): Producer→consumer active cache transfers
- Samsung: SoC data sync between processors
- Microsoft: Parallel flush recovery of sliced reorder buffers
- Huawei: Multi-layer reorder buffer
Context switching & migration
- Apple: Thread-channel deactivation; memory-backed register preemption; multi-stage thread scheduling (×3)
- Intel: NVM cloning w/ hardware copy-on-write
- VMware: Cross-privilege-domain communication in CPU cores
- Untether AI: Computational memory (×3)
- Rebellions: NPU translation-lookaside-buffer updating
Virtual memory & translation
- Intel: Pointer-extent-informed predictors
- Intel: NVM cloning w/ HW copy-on-write
- Apple: Memory Objects
- IBM: Context tracking in virtually-tagged caches
- Samsung: Systems & methods for address translation
Near-memory & sparse data movement
- AMD: Near-memory data-dependent gather & packing
- AMD: Reducing side-effects of compute offload to memory
- Intel: Smart memory store/load; disaggregated-memory filtering
- Samsung: NDP data-centric server; HBM ISA extension
- SK hynix: Memory-controller command scheduling (×2)
Memory reliability & prediction
- Samsung: SSD-based RAID
- Apple: Dynamic address-based data reliability
- Raytheon: Optimal bit apportionment vs soft errors (×3)
- Ampere: Address-range memory mirroring
- Micron: Selective power-on scrub; accelerated read translation
Method: Google Patents “Cited by” and family-citation data, mined June 2026. A citation marks later work that builds on or relates to the patent: prior art acknowledged by the applicant or examiner, not endorsement.
Impact · papers
Cited in the literature
RaftLib alone: 42 citations. The body of work is cited across OSDI, EuroSys, SC, USENIX ATC, HPCA, MICRO, CGO, and HPDC. See the full record on Google Scholar.
Stream processing & RaftLib
- EuroSys 2020: PaSh: light-touch data-parallel shell processing (Vasilakis)
- OSDI 2022: Practically Correct, Just-in-Time Shell Script Parallelization (Kallas)
- SC 2022: TD-NUCA: Runtime-Driven Management of NUCA Caches (Caheny)
- USENIX ATC 2018: Scaling HW-Accelerated Network Monitoring (*Flow) (Sonchack)
- SoCC 2025: VLCs: Managing Parallelism with Virtualized Libraries (Yan)
Source: RaftLib (IJHPCA) · 42 citations
Near-memory & sparse acceleration
- HPCA 2021: FAFNIR: Accelerating Sparse Gathering by Near-Memory Reduction (Asgari)
- IEEE Access 2021: DAMOV: Benchmark Suite for Data-Movement Bottlenecks (Oliveira)
- MICRO 2023: A Tensor Marshaling Unit for Sparse Tensor Algebra (Siracusa)
- PACT 2024: Mozart: Taming Taxes and Composing Accelerators (Suresh)
- CGO 2026: Ember: Compiler for Decoupled Access-Execute (Siracusa)
Source: SPiDRE · Dark Bandwidth · NUCD
Hardware queues & messaging
- HPCA 2025: Push Multicast: Speculative Coherent Interconnect (Huang)
- CC 2024: BLQ: Locality-Aware Blocking-Less Queuing (Wu)
- HotOS 2023: NextGen-Malloc: Giving the Allocator Its Own Room (Li)
- CF 2024: HASIIL: HW-Assisted Scheduling for IPC Latency in Linux (Twardzik)
Source: Virtual-Link · SPAMeR
Performance modeling of streaming
- USENIX ATC 2019: EdgeWise: A Better Stream Processing Engine for the Edge (Fu)
- HPDC 2023: Streaming Task Graph Scheduling for Dataflow Architectures (De Matteis)
- Parallel Computing 2021: Reducing queuing impact in irregular dataflow (Timcheck)
- IPDPSW 2024: Network-Calculus Models for Streaming Applications (Faber)
Source: Analytic streaming models (MASCOTS) · 20 citations
Method: Semantic Scholar forward citations across 26 publications, mined June 2026; curated to recognizable venues, self-citations excluded. Canonical counts live on Google Scholar.